Xilinx

Description

DATASHEET Feb 1, 1997 ric for the XC5000 FPGAs is 12 times the number of logic cells (or 48 times Table 2: XC5000 Series FPGA Capacity Metrics. Device. Number Altogether, the XC5000 architecture contains five levels of interconnect hierar- chy: the single-length, double length, and long/global lines of the GRM, and the. RESET/OE(1). ORCA, VIRTEX-II, VIRTEX-E,. VIRTEX, SPARTAN, SPARTAN II,. XC5000 , XC4000, XC3000. AT17LVXXX Series Device 1. SER_EN. CEO(A2)(5). Dec 12, 1998 Spartan , XC3000, XC4000, XC5000 , XC9000. Introduction. In the Spartan , XC3000, XC4000, and XC5200 device families, Xilinx offers Dec 3, 1998 Spartan , XC3000, XC4000, XC5000 , XC9000. Introduction. Xilinx offers Field- Programmable Logic circuits, mass pro- duced standard