Xilinx

Description

May 8, 2017 Kintex-7 FPGAs Data Sheet: DC and AC Switching Characteristics. DS182 (v2.16 ) May 8, 2017 www.xilinx.com. Product Specification. 6. ICCOQ. Quiescent VCCO supply current. XC7K70T. 1. 1. 1. N/A. N/A. N/A. 1. mA. XC7K160T . 1. 1. 1. N/A. N/ A. 1. 1. mA. XC7K325T. 1. 1. 1. N/A. N/A. 1. 1. mA. XC7K355T. Aug 1, 2017 Configurable Logic. Blocks (CLBs). DSP. Slices(2). Block RAM Blocks(3). CMTs( 4). PCIe(5). GTXs. XADC. Blocks. Total I/O. Banks(6). Max. User. I/O(7). Slices(1). Max. Distributed. RAM (Kb). 18 Kb. 36 Kb. Max (Kb). XC7K70T. 65,600. 10,250. 838. 240. 270. 135. 4,860. 6. 1. 8. 1. 6. 300. XC7K160T . 162,240. Jul 24, 2017 Revised the FBG484 and FBV484 Package section describing XC7K160T Banks. Added the mechanical drawings: Figure 4-39 and Figure 4-43. Updated Figure 4- 42 to include the FF(G)1928 package. Added thermal resistance data to Table 5- 1. 10/03/2011. 1.3. Added Artix-7 device information including Reduce power by 64% and reduce cost by 85% with a single XC7K160T FPGA implementation of a 12x 3G-SDI over 4x10GbE bridge compared to the equivalent function implemented in two Virtex-6 XC6L130T devices. Reduce cost further with high-bandwidth interfaces that shrink BOM: 72-bit x 1,600Mbps DDR3 Oct 31, 2016 The purpose of this notification is to announce that selected Xilinx lead-free flip chip products denoted by the package code FFG , FBG , or SBG will be shipped with either the current eutectic C4 bump and associated substrate or the new lead-free C4 bump and associated lead-free substrate.